With an image taking apparatus, such as a digital still camera, pressing the shutter causes the capturing of a still image. The taken original image data is subjected to internal signal processing, such as imaged signal processing and encode processing, and the resultant processed data is recorded to a detachable recording media for example. In this process, the taken original image data is temporarily held in an image memory before being subjected to internal signal processing. This image memory, formed by a DRAM (Dynamic Random Access Memory) or an SDRAM (Synchronous DRAM), has come to require a larger storage capacity prompted by the recent technologies of packing the greater number of pixels, but at the expense of increased hardware cost and power dissipation.
Therefore, with conventional image taking apparatuses, the taken original image data is compressed before being stored in the image memory. The compressed data is read from the image memory and decompressed to be subjected to later processing. For example, an image processing circuit is proposed (Japanese Patent Laid-Open No. 2002-111989 (FIG. 3) for example) in which the original image data is compressed by executing an entropy encoding processing such as binary arithmetic coding and Huffman coding on a difference value between two nearby pixels. In the conventional technique described above, the correlation between nearby pixels is used to reduce the amount of data to be stored in the image memory. The correlation between pixels is obtained by executing hardware or software processing; in the hardware approach, an entropy encoding processing circuit must be separately prepared, while the software approach presents a problem of making the processing time longer due to the packing of increasing number of pixels.
It is therefore an object of the present invention to provide a compression and decompression technique that is simpler than conventional equivalent but significantly reduces the required storage size of the image memory.